1. Field of the Invention
This invention relates to operational amplifier circuits utilized as voltage comparators and more particularly to an operational amplifier circuit utilizing methods to eliminate the effect of inherent offset voltages on its output lead when used as a voltage comparator.
2. Description of the Prior Art
The use of operational amplifiers to operate as voltage comparators is well known in the prior art. FIG. 1 shows a symbolic diagram of an operational amplifier. Operational amplifier 1 contains inverting input 2, noninverting input 3, and output 4. The comparator shown in FIG. 1 contains no means for providing feedback from output 4 to inverting input 2. Thus, the amplification factor of operational amplifier 1 will be very high. When a voltage is applied to noninverting input 3 which is more positive than the voltage applied to inverting input 2, operational amplifier 1 will amplify the positive difference in voltages appearing across inputs 2 and 3. Thus, output 4 will become very positive, being equal to the product of the input voltage difference times the gain of the amplifier, until the amplifier saturates. Because there is no feedback between output 4 and inputs 2 and 3, the gain of operational amplifier 1 will be very high, thus forcing output 4 to very nearly equal the value V.sub.DD of the positive supply voltage applied to operational amplifier 1. Similarly, when the voltage applied to noninverting input 3 is more negative than the voltage applied to inverting input 2, operational amplifier 1 will amplify greatly the negative voltage appearing across inputs 2 and 3, thus causing output 4 to become very negative, essentially equal to the value V.sub.SS of the negative voltage supply applied to operational amplifier 1. In this manner, if a positive voltage is applied across terminals 3 and 2 of operational amplifier 1, output 4 will become very positive. Similarly, if a negative voltage is applied across inputs 3 and 2 of operational amplifier 1, output 4 will become very negative. The relationship between input voltages and output voltage of an ideal operational amplifier used as a voltage comparator is shown in FIG. 2.
In actual operational amplifier circuits, finite component mismatches create voltage offsets. These voltage offsets are unique to each operational amplifier circuit, due to unique component mismatches. Thus, for example, in the operational amplifier in FIG. 1, an offset voltage may exist where a slightly positive voltage applied across inputs 3 and 2 will cause output 4 to become very negative. The relationship between the input voltage and the output voltage of an actual operational amplifier operated as a comparator is shown in FIG. 3. In FIG. 3, the point at which the comparator output switches from a negative voltage to a positive voltage is labeled V.sub.off. Thus, for input voltages between 0 and V.sub.off, the output of comparator 1 will be erroneous.
Attempts have been made in the prior art to eliminate the errors in comparators caused by offset voltages inherent in operational amplifiers. One such attempt is shown in the circuit of FIG. 4. In FIG. 4, operational amplifier 1 again contains inverting input 2, noninverting input 3 and output 4. Capacitor 5 is connected between inverting input 2 and ground, as shown. Inverting input 2 is connected to output 4 through switch 6, thus allowing operational amplifier 1 to operate in the unity gain mode when switch 6 is closed. In the operation of the circuit of FIG. 4 as a voltage comparator, an input voltage is applied to noninverting input 3, which is then compared to a reference voltage previously stored on capacitor 5 which is applied to inverting input 2. To store the reference voltage on capacitor 5, switch 6 is closed, thus placing operational amplifier 1 in the unity gain mode. The reference voltage to which later input voltages are to be compared is applied to noninverting input 3. At this point, an ideal operational amplifier will have the reference voltage appearing on output 4 applied to its inverting input 2 through switch 6. However, actual operational amplifiers will have the reference voltage minus the inherent offset voltage of the operational amplifier, V.sub.off, on output 4 and thus applied to noninverting input 2 through switch 6. Thus, V.sub.REF -V.sub.OFF is stored on capacitor 5. Switch 6 is then opened, thus allowing operational amplifier 1 to operate as a voltage comparator, with a very high amplification. If an input voltage greater than V.sub.REF is applied to noninverting input 3, output 4 will go very positive, approximately to the voltage level of the positive supply voltage (V.sub.DD) applied to operational amplifier 1. Similarly, if a voltage less than V.sub.REF is applied to noninverting input 3, output 4 will go very negative, approximately equal to the voltage level of the negative supply voltage (V.sub.SS) applied to operational amplifier 1.
A distinct disadvantage of the circuit of FIG. 4 is that in many instances, while attempting to store a reference voltage on capacitor 5 by placing operational amplifier 1 in the unity gain mode by closing switch 6, the signal on output 4 is more than 180.degree. out of phase with the voltage appearing on input 3. This phase difference causes positive feedback, thereby causing instability and causing output 4, and thus the voltage stored on capacitor 5, to become either extremely positive or extremely negative. In this fashion, the voltage stored on capacitor 5 will not be equal to V.sub.REF -V.sub.OFF, and operational amplifier 1 will not function properly as a voltage comparator.
A detailed circuit diagram of a prior art operational amplifier utilizing MOS technology is shown in FIG. 5. A positive supply voltage, denoted as V.sub.DD, is connected to terminal 40. A negative supply voltage, designated as V.sub.SS, is connected to terminal 42. Bias generator 51, containing MOS transistors 11 and 12, operates to generate a fixed bias voltage at node 88. This bias voltage is applied to gate 9 of current source transistor 16, contained within current mirror differential amplifier input stage 52, as shown. This causes a constant current to flow through lead 8. Input terminals 2 and 3 are connected to current mirror MOS transistors 15 and 17, respectively. Transistors 18, 19 and 20 form level shift stage 53, as shown. Level shift stage 53 allows operational amplifier 1 to operate as a class AB amplifier, thereby having lower power dissipation over operational amplifiers that do not utilize a level shift stage, which operate as class A amplifiers. Transistors 21 and 22 form output stage 54 as shown, with terminal 4 available as the source of the output signal from operational amplifier 1.
FIG. 6 shows a detailed schematic diagram of an operational amplifier used as a voltage comparator connected as shown in FIG. 4. Circuit elements common to both FIG. 5 and FIG. 6 are numbered similarly. However, the circuit of FIG. 6 has several additional elements. Gate 7 of input current mirror transistor 15 is internally connected via lead 2 to node 74. Capacitor 108 is connected between node 74 and ground, and serves to store a reference voltage for use when operational amplifier 1 is used as a voltage comparator. Node 74 is also connected to output 4 at node 73 through transmission gate 107 comprised of a complimentary pair of MOS transistors 105 and 106 as shown. When a logical low is placed on input node 43, P-channel MOS transistor 105 turns on. At the same time, a logical high is placed on node 75 by inverter 109, thus causing N-channel MOS transistor 106 to turn on. Thus, transmission gate 107 will conduct, effectively connecting output node 73 to gate 7 of input transistor 15 and reference voltage storage capacitor 108. This places operational amplifier 1 in the unity gain mode. With a reference voltage V.sub.REF applied to input terminal 3, the voltage stored on capacitor 108 will be V.sub.REF -V.sub.OFF, where V.sub.OFF is the offset voltage of operational amplifier 1.
In addition, capacitor 101 is permanently connected between node 71 in differential amplifier input stage 52, and output node 73. This capacitor reduces the phase shift between the signal appearing on output node 73 and input node 71 to less than 180.degree., thus providing negative feedback between output stage 54 and differential amplifier input stage 52. This negative feedback guarantees stability when operational amplifier 1 is placed in the unity gain mode by placing a low on input terminal 43 causing transmission gate 107 to conduct. This stability is guaranteed irrespective of the value of load capacitor 108. Thus, the prior art circuit of FIG. 6 overcomes the disadvantages of the prior art circuit of FIG. 4 and the prior art circuit of FIG. 5 by utilizing both a storage capacitor for storing V.sub.REF -V.sub.OFF for use on one input, while adding capacitor 101 to guarantee stability such that operational amplifier 1 will function properly in the unity gain mode. However, the addition of capacitor 101 decreases response time of operational amplifier 1 by decreasing the slew rate. The slew rate is equal to I.sub.1 /C.sub.1, where I.sub.1 is equal to the current flowing through current source transistor lead 8, and C.sub.1 is equal to the capacitance of capacitor 101 plus any parasitic capacitance appearing on node 71. This decreased slew rate is a distinct disadvantage of prior art operational amplifier circuits operating as comparators utilizing voltage offset compensation means.